The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2011
Filed:
Jan. 28, 2008
Hsiang-lan Lung, Elmsford, NY (US);
Chung Hon Lam, Peekskill, NY (US);
Matthew J. Breitwisch, Yorktown Heights, NY (US);
Chieh Fang Chen, Panchiao, TW;
Hsiang-Lan Lung, Elmsford, NY (US);
Chung Hon Lam, Peekskill, NY (US);
Matthew J. Breitwisch, Yorktown Heights, NY (US);
Chieh Fang Chen, Panchiao, TW;
Macronix International Co., Ltd., Hsinchu, TW;
International Business Machines, Armonk, NY (US);
Abstract
A memory cell includes a memory cell layer with a first dielectric layer over a bottom electrode layer, a second dielectric layer over the first dielectric layer, and a top electrode over the second dielectric layer. The dielectric layers define a via having a first part bounded by the first electrode layer and the bottom electrode and a second part bounded by the second dielectric layer and the top electrode. A memory element is within the via and is in electrical contact with the top and bottom electrodes. The first and second parts of the via may comprise a constricted, energy-concentrating region and an enlarged region respectively. The constricted region may have a width smaller than the minimum feature size of the process used to form the enlarged region of the via. A method for manufacturing a memory cell is also disclosed.