The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2011

Filed:

May. 23, 2006
Applicants:

Paul A. Leveille, Grafton, MA (US);

Thomas D. Bissett, Shirley, MA (US);

Stephen S. Corbin, Amherst, NH (US);

Jerry Melnick, Wayland, MA (US);

Glenn A. Tremblay, Escondido, CA (US);

Satoshi Watanabe, Tokyo, JP;

Keiichi Koyama, Tokyo, JP;

Inventors:

Paul A. Leveille, Grafton, MA (US);

Thomas D. Bissett, Shirley, MA (US);

Stephen S. Corbin, Amherst, NH (US);

Jerry Melnick, Wayland, MA (US);

Glenn A. Tremblay, Escondido, CA (US);

Satoshi Watanabe, Tokyo, JP;

Keiichi Koyama, Tokyo, JP;

Assignee:

Marathon Technologies Corporation, Littleton, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A symmetric multiprocessing fault-tolerant computer system controls memory access in a symmetric multiprocessing computer system. To do so, virtual page structures are created, where the virtual page structures reflect physical page access privileges to shared memory for processors in a symmetric multiprocessing computer system. Access to shared memory is controlled based on physical page access privileges reflected in the virtual paging structures to coordinate deterministic shared memory access between processors in the symmetric multiprocessing computer system. A symmetric multiprocessing fault-tolerant computer system may use duplication or continuous replay.


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