The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2011

Filed:

Aug. 31, 2010
Applicants:

Sachin Joshi, Fremont, CA (US);

Mark Birman, Los Altos, CA (US);

Maheshwaran Srinivasan, Santa Clara, CA (US);

Sandeep Khanna, Los Altos, CA (US);

Varadarajan Srinivasan, Los Altos Hills, CA (US);

Inventors:

Sachin Joshi, Fremont, CA (US);

Mark Birman, Los Altos, CA (US);

Maheshwaran Srinivasan, Santa Clara, CA (US);

Sandeep Khanna, Los Altos, CA (US);

Varadarajan Srinivasan, Los Altos Hills, CA (US);

Assignee:

NetLogic Microsystems, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A content addressable memory (CAM) device includes a plurality of CAM rows, a number of sequencing logic circuits, and a programmable interconnect structure. Each CAM row includes a number of CAM cells to generate a match signal on a match line and includes an enable input. Each sequencing logic circuit includes an input and an output, and is configured to count sequences of match signals from the CAM rows. The programmable interconnect structure selectively connects the match line of any CAM row to the input of any sequencing logic circuit, and selectively connects the output of any sequencing logic circuit to the enable input of any CAM row.


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