The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2011

Filed:

Oct. 21, 2009
Applicants:

Po-lin Chen, Hsinchu, TW;

Wen-ching Tsai, Hsinchu, TW;

Chun-nan Lin, Hsinchu, TW;

Kuo-yuan Tu, Hsinchu, TW;

Inventors:

Po-Lin Chen, Hsinchu, TW;

Wen-Ching Tsai, Hsinchu, TW;

Chun-Nan Lin, Hsinchu, TW;

Kuo-Yuan Tu, Hsinchu, TW;

Assignee:

Au Optronics Corp., Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01); H01L 29/10 (2006.01); H01L 31/00 (2006.01); H01L 21/00 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.


Find Patent Forward Citations

Loading…