The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2011
Filed:
May. 20, 2009
Shunji Kuwahara, Tokyo, JP;
Hiroki Fujisawa, Tokyo, JP;
Shunji Kuwahara, Tokyo, JP;
Hiroki Fujisawa, Tokyo, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
In a calibration control circuit, a first clock gate circuit restricts passage of reference update clocks during a calibration period so as to stop a first one of the reference update clocks and supplies the restricted reference update clocks as first update clocks CLKto both a hit determination circuit and a second clock gate circuit. The second clock gate circuitpasses through the first update clocks CLKuntil reception of a hit signal from the hit determination circuit and delivers second update clocks CLKto an up/down counter. The up/down counteris operated by the second update clocks CLK. With this structure, the second update clocks used for adjustment steps can be increased in number during the calibration period.