The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2011

Filed:

Jan. 05, 2009
Applicants:

Wagdi W. Abadeer, Jericho, VT (US);

Jeffrey S. Brown, Middlesex, VT (US);

David M. Fried, Ithaca, NY (US);

Robert J. Gauthier, Jr., Hinesburg, VT (US);

Edward J. Nowak, Essex Junction, VT (US);

Jed H. Rankin, South Burlington, VT (US);

William R. Tonti, Essex Junction, VT (US);

Inventors:

Wagdi W. Abadeer, Jericho, VT (US);

Jeffrey S. Brown, Middlesex, VT (US);

David M. Fried, Ithaca, NY (US);

Robert J. Gauthier, Jr., Hinesburg, VT (US);

Edward J. Nowak, Essex Junction, VT (US);

Jed H. Rankin, South Burlington, VT (US);

William R. Tonti, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/772 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor structure and a system for fabricating an integrated circuit chip. The semiconductor structure includes: a buried oxide layer on a semiconductor wafer; a thin fin structure on the buried oxide layer, wherein the thin fin structure includes a first hard mask on a semiconductor fin, wherein the semiconductor fin is disposed between the first hard mask and a surface of the buried oxide layer; and a thick mesa structure on the buried oxide layer, and wherein the thick mesa structure includes a semiconductor mesa. The system for fabricating an integrated circuit chip enables: providing a buried oxide layer on and in direct mechanical contact with a semiconductor wafer; and concurrently forming at least one fin-type field effect transistor and at least one thick-body device on the buried oxide layer.


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