The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7868663 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 11, 2011

Filed:

Jul. 10, 2008
Applicants:

Ic-su OH, Ichon, KR;

Kun-woo Park, Ichon, KR;

Yong-ju Kim, Ichon, KR;

Hee-woong Song, Ichon, KR;

Hyung-soo Kim, Ichon, KR;

Tae-jin Hwang, Ichon, KR;

Hae-rang Choi, Ichon, KE;

Ji-wang Lee, Ichon, KR;

Inventors:

Ic-Su Oh, Ichon, KR;

Kun-Woo Park, Ichon, KR;

Yong-Ju Kim, Ichon, KR;

Hee-Woong Song, Ichon, KR;

Hyung-Soo Kim, Ichon, KR;

Tae-Jin Hwang, Ichon, KR;

Hae-Rang Choi, Ichon, KE;

Ji-Wang Lee, Ichon, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 19/00 (2006.01); G11C 7/00 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

A receiver circuit for sensing and transmitting input data in sync with a plurality of clock signals having mutually different phase sequentially enabled comprising a sense amplifier configured to receive, as offset voltages, first signals which can be obtained by amplifying the input data in sync with a first clock signal of the plurality of clock signals, being driven in sync with a second clock signal enabled subsequently to the first clock signal, and outputting second signals, and a discharging controller configured to control a discharging speed of the sense amplifier according to the offset voltages to control a driven speed of the sense amplifier.


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