The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7867828 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 11, 2011

Filed:

Jul. 24, 2007
Applicant:

Hiroyasu Jobetto, Hachioji, JP;

Inventor:

Hiroyasu Jobetto, Hachioji, JP;

Assignees:

Casio Computer Co., Ltd., Tokyo, JP;

CMK Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes a base plate, and a semiconductor constituent body formed on the base plate. The semiconductor constituent body has a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate. An insulating layer is formed on the base plate around the semiconductor constituent body. A hard sheet is formed on the insulating layer. An interconnection is connected to the external connecting electrodes of the semiconductor constituent body.


Find Patent Forward Citations

Jobetto, Hiroyasu. (2011). Method of fabricating a semiconductor device including forming an insulating layer with a hard sheet buried therein (U.S. Patent No. 7867828). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7867828

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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