The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2011
Filed:
Jan. 23, 2007
Amit Chopra, Uttar Pradesh, IN;
Ian Gebbie, Edinburgh, GB;
Donald O'riordan, Sunnyvale, CA (US);
Sumit Arora, New Delhi, IN;
Jean-daniel Sonnard, Lausanne, CH;
Amit Chopra, Uttar Pradesh, IN;
Ian Gebbie, Edinburgh, GB;
Donald O'Riordan, Sunnyvale, CA (US);
Sumit Arora, New Delhi, IN;
Jean-Daniel Sonnard, Lausanne, CH;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Features are provided for graphically representing constraints on design objects in an Electronic Design Automation tool. A particular constraint on one or more circuit objects is displayed as a highlighted region that extends to each visible circuit object to which the constraint applies. Attributes of the highlighted region, such as density and thickness, may proportionally represent attributes of the constraint, such as a strength or distance specified by the constraint. The highlighted region is superimposed on or around circuit objects. The highlighted region may be a halo, which is a partially transparent region filled with a color. Multiple regions that represent the same type of constraint or relationship are connected by line segments, providing the ability to visualize groups of constrained objects, including groups that span levels of a hierarchical design. Intersecting highlighted regions are blended together using techniques such as alpha blending.