The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2011
Filed:
Jun. 23, 2009
Yasushi Ishii, Tokyo, JP;
Takashi Hashimoto, Tokyo, JP;
Yoshiyuki Kawashima, Tokyo, JP;
Koichi Toba, Tokyo, JP;
Satoru Machida, Tokyo, JP;
Kozo Katayama, Tokyo, JP;
Kentaro Saito, Tokyo, JP;
Toshikazu Matsui, Tokyo, JP;
Yasushi Ishii, Tokyo, JP;
Takashi Hashimoto, Tokyo, JP;
Yoshiyuki Kawashima, Tokyo, JP;
Koichi Toba, Tokyo, JP;
Satoru Machida, Tokyo, JP;
Kozo Katayama, Tokyo, JP;
Kentaro Saito, Tokyo, JP;
Toshikazu Matsui, Tokyo, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrodeof the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrodeare formed in a multilayer structure including an electrode material filmA and an electrode material layerB, and the gate electrodeis a single layer structure formed at the same time as the electrode material filmA of the control gate.