The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2010
Filed:
Mar. 14, 2008
Sung Min Kim, Seoul, KR;
Chang Jun Park, Gyeonggi-do, KR;
Kwon Whan Han, Seoul, KR;
Seong Cheol Kim, Seoul, KR;
Hyeong Seok Choi, Seoul, KR;
Ha NA Lee, Gyeonggi-do, KR;
Sung Min Kim, Seoul, KR;
Chang Jun Park, Gyeonggi-do, KR;
Kwon Whan Han, Seoul, KR;
Seong Cheol Kim, Seoul, KR;
Hyeong Seok Choi, Seoul, KR;
Ha Na Lee, Gyeonggi-do, KR;
Hynix Semiconductor Inc., Kyoungki-do, KR;
Abstract
A stacked wafer level semiconductor package module includes a semiconductor chip module including first and second semiconductor chips each having a rectangular shape. The first semiconductor chip has first pads disposed along a first short side of a lower surface thereof. The second semiconductor chip has second pads disposed along a first short side of a lower surface thereof. The first and second semiconductor chips are stacked so as to expose the first pad and the second pad on one side of the stacked first and second semiconductor chips. The package also includes a substrate having a first connection pad facing the first pad and a second connection pad facing the second pad. The package also includes a first connection member for connecting the first pad to the first connection pad, and a second connection member for connecting the second pad to the second connection pad.