The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2010
Filed:
Feb. 15, 2007
Hoe-ku Jung, Daejeon, KR;
Myung-sam Kang, Daejeon, KR;
Ji-eun Kim, Gwangmyeong-si, KR;
Jung-hyun Park, Cheongju-si, KR;
Hoe-Ku Jung, Daejeon, KR;
Myung-Sam Kang, Daejeon, KR;
Ji-Eun Kim, Gwangmyeong-si, KR;
Jung-Hyun Park, Cheongju-si, KR;
Samsung Electro-Mechanics Co., Ltd., Suwon, KR;
Abstract
An aspect of the present invention features a method for manufacturing a substrate having a cavity. The method can comprises: (a) forming an upper layer circuit on an upper seed layer; (b) laminating a dry film on a portion of the upper seed layer where a cavity is to be formed; (c) fabricating an upper outer layer by forming an insulation layer on top of the upper seed layer and on top and sides of the upper layer circuit; (d) stacking the upper outer layer on one side of a core layer where an internal circuit is formed; (e) removing the upper seed layer; and (f) forming the cavity by removing the dry film. The method for manufacturing a substrate with a cavity according to the present invention can reduce the total thickness of the substrate while the thickness of an insulation layer remains the same, by forming the insulation layer on sides of an external circuit.