The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2010
Filed:
Jan. 18, 2008
Randall G. Alley, Raleigh, NC (US);
Philip A. Deane, Durham, NC (US);
David A. Koester, Burlington, NC (US);
Thomas Peter Schneider, Durham, NC (US);
Jesko Von Windheim, Wake Forest, NC (US);
Randall G. Alley, Raleigh, NC (US);
Philip A. Deane, Durham, NC (US);
David A. Koester, Burlington, NC (US);
Thomas Peter Schneider, Durham, NC (US);
Jesko von Windheim, Wake Forest, NC (US);
Nextreme Thermal Solutions, Inc., Durham, NC (US);
Abstract
An electronic assembly may include a packaging substrate, an integrated circuit (IC) semiconductor chip, a plurality of metal interconnection structures, and a thermoelectric heat pump. The integrated circuit (IC) semiconductor chip may have an active side including input/output pads thereon and a back side opposite the active side, and the IC semiconductor chip may be arranged with the active side facing the first surface of the packaging substrate. The plurality of metal interconnection structures may be between the active side of the IC semiconductor chip and the first surface of the packaging substrate, and the plurality of metal interconnection structures may provide mechanical connection between the active side of the IC semiconductor chip and the first surface of the packaging substrate. The thermoelectric heat pump may be coupled to the packaging substrate with the thermoelectric heat pump being configured to actively pump heat between the IC semiconductor chip and the packaging substrate. Related methods and structures are also discussed.