The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2010

Filed:

Sep. 30, 2008
Applicants:

Matthew Spuller, San Francisco, CA (US);

Melody Agustin, Santa Clara, CA (US);

Meiyee (Maggie Le) Shek, Palo Alto, CA (US);

Li-qun Xia, Cupertino, CA (US);

Reza Arghavani, Scotts Valley, CA (US);

Inventors:

Matthew Spuller, San Francisco, CA (US);

Melody Agustin, Santa Clara, CA (US);

Meiyee (Maggie Le) Shek, Palo Alto, CA (US);

Li-Qun Xia, Cupertino, CA (US);

Reza Arghavani, Scotts Valley, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/469 (2006.01); C23C 16/40 (2006.01); C23C 16/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer.


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