The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2010
Filed:
Jul. 21, 2005
Jung-hwan Hah, Hwaseong-si, KR;
Jin Hong, Hwaseong-si, KR;
Hyun-woo Kim, Hwaseong-si, KR;
Hata Mitsuhiro, Suwon-si, KR;
Kolake Mayya Subramanya, Suwon-si, KR;
Sang-gyun Woo, Yongin-si, KR;
Jung-Hwan Hah, Hwaseong-si, KR;
Jin Hong, Hwaseong-si, KR;
Hyun-Woo Kim, Hwaseong-si, KR;
Hata Mitsuhiro, Suwon-si, KR;
Kolake Mayya Subramanya, Suwon-si, KR;
Sang-Gyun Woo, Yongin-si, KR;
Samsung Electronics Co., Ltd., Suwon-Si, KR;
Abstract
Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.