The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2010

Filed:

Dec. 19, 2008
Applicants:

Damodar R. Thummalapally, Milpitas, CA (US);

Richard K. Chou, Palo Alto, CA (US);

Inventors:

Damodar R. Thummalapally, Milpitas, CA (US);

Richard K. Chou, Palo Alto, CA (US);

Assignee:

SuVolta, Inc., Los Gatos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory cell includes an access transistor, first and second pull-up transistors, first and second pull-down transistors, and a first search transistor. The access transistor is connected to a first word line and connected between a first bit line and a first data node. The first pull-up transistor is connected to a first power supply point and the first data node, and the second pull-up transistor is connected to the first power supply point and the second data node. The first pull-down transistor is connected to a second power supply point and the first data node, and the second pull-down transistor is connected to the second power supply point and the second data node. The first search transistor is connected to the second data node and includes a source terminal connected to a third power supply point comprising a voltage less than the voltage at the second power supply point.


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