The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2010
Filed:
Mar. 09, 2007
Roman J. Hamerski, Overland Park, KS (US);
Zerui Chen, Burnaby, CA;
James Man-fai Hong, San Leandro, CA (US);
Johnny Duc Van Chiem, Camarillo, CA (US);
Christopher D. Hruska, Blue Springs, MO (US);
Timothy Eastman, Lee's Summit, MO (US);
Roman J. Hamerski, Overland Park, KS (US);
Zerui Chen, Burnaby, CA;
James Man-Fai Hong, San Leandro, CA (US);
Johnny Duc Van Chiem, Camarillo, CA (US);
Christopher D. Hruska, Blue Springs, MO (US);
Timothy Eastman, Lee's Summit, MO (US);
Diodes Fabtech Inc., Lee's Summit, MO (US);
Abstract
A high-efficiency power semiconductor rectifier device () comprising a δP++ layer (), a P-body (), an N-drift region (), an N+ substrate (), an anode (), and a cathode (). The method of fabricating the device () comprises the steps of depositing the N-drift region () on the N+ substrate (), implanting boron into the N-drift region () to create a P-body region (), forming a layer of titanium silicide () on the P-body region (), and concentrating a portion of the implanted boron at the interface region between the layer of titanium silicide () and the P-body region () to create the δP++ layer () of supersaturated P-doped silicon.