The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2010
Filed:
Jun. 08, 2007
Thomas Dyer, Pleasant Valley, NY (US);
Rajendran Krishnasamy, Essex Junction, VT (US);
Jin-ping Han, Fishkill, NY (US);
Ernst Demm, Putnam Valley, NY (US);
Thomas Dyer, Pleasant Valley, NY (US);
Rajendran Krishnasamy, Essex Junction, VT (US);
Jin-Ping Han, Fishkill, NY (US);
Ernst Demm, Putnam Valley, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Infineon Technologies AG, Munich, DE;
Abstract
There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the FET; forming a stress liner covering the gate and the source and drain regions; removing a portion of the stress liner, the portion of the stress liner being located on top of the gate of the FET; removing at least a substantial portion of the gate of a first gate material and thus creating an opening therein; and filling the opening with a second gate material.