The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7838361 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 23, 2010

Filed:

Sep. 26, 2008
Applicants:

Yong-tae Cho, Icheon-si, KR;

Eun-mi Kim, Icheon-si, KR;

Inventors:

Yong-Tae Cho, Icheon-si, KR;

Eun-Mi Kim, Icheon-si, KR;

Assignee:

Hynix Semiconductor Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a recess gate in a semiconductor device includes etching a silicon substrate to form a trench that defines an active region, forming a device isolation layer that gap-fills the trench, forming a hard mask layer over the silicon substrate, the hard mask layer comprising a stack of an oxide layer and an amorphous carbon layer, wherein the hard mask layer exposes a channel target region of the active region, and forming a recess region with a dual profile by first etching and second etching the channel target region using the hard mask layer as an etch barrier, wherein the second etching is performed after removing the amorphous carbon layer.


Find Patent Forward Citations

Cho, Yong-Tae. (2010). Method for fabricating recess gate in semiconductor device (U.S. Patent No. 7838361). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7838361

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