The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2010

Filed:

Jun. 30, 2006
Applicants:

Debendra Das Sharma, Santa Clara, CA (US);

Surena Neshvad, Hillsboro, OR (US);

Guru Rajamani, Sunnyvale, CA (US);

Hanh Hoang, Sunnyvale, CA (US);

Inventors:

Debendra Das Sharma, Santa Clara, CA (US);

Surena Neshvad, Hillsboro, OR (US);

Guru Rajamani, Sunnyvale, CA (US);

Hanh Hoang, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus is described herein for tracking errors for one of a plurality of lanes in a link, tracking errors for the link, and in the case of a root complex, tracking error correction messages. This information is used to determine the suitability for use of a lane and to determine if correction action is needed. In one embodiment, this method and apparatus is used with PCI Express interconnects.


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