The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2010

Filed:

Oct. 05, 2004
Applicants:

Stephen M. Prather, Austin, TX (US);

Matthew S. Berzins, Austin, TX (US);

Charles A. Cornell, Austin, TX (US);

Steven P. Larky, Del Mar, CA (US);

Joseph A. Cetin, San Diego, CA (US);

Inventors:

Stephen M. Prather, Austin, TX (US);

Matthew S. Berzins, Austin, TX (US);

Charles A. Cornell, Austin, TX (US);

Steven P. Larky, Del Mar, CA (US);

Joseph A. Cetin, San Diego, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method are disclosed synchronization of a clock signal to a data signal. The apparatus includes a phase lock and tracking logic circuit configured to detect a plurality of values. Each of the plurality of values indicates a position of a data edge of the data signal. The phase lock and tracking logic circuit adds the plurality of values to generate a result and to adjust the clock signal if the result is greater than a predetermined value, or threshold. The phase lock and tracking logic circuit may be configured to maintain the clock signal linearity approximately between the end of a first data packet and the beginning of a second data packet.


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