The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2010

Filed:

Jul. 09, 2008
Applicants:

Brian Hang Wal Yang, Monterey Park, CA (US);

Kai-yeung (Sunny) Siu, San Jose, CA (US);

Mizanur M. Rahman, Cupertino, CA (US);

Wei-han Lien, Cupertino, CA (US);

Gaurav Singh, Santa Clara, CA (US);

Inventors:

Brian Hang Wal Yang, Monterey Park, CA (US);

Kai-Yeung (Sunny) Siu, San Jose, CA (US);

Mizanur M. Rahman, Cupertino, CA (US);

Wei-Han Lien, Cupertino, CA (US);

Gaurav Singh, Santa Clara, CA (US);

Assignee:

Netlogic Microsystems, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/54 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to a crossbar switch controller including an input terminal configured to receive a set of service request signals from a set of virtual output queues each comprising a set of packets. The invention also includes a matrix circuit coupled to the input terminal and configured to represent the set of service request signals in the form of a matrix, wherein each service request signal is described by a row position M and a column position N. The invention further includes an output terminal configured to receive a portion of the set of packets during an epoch, an arbiter circuit configured to iteratively scan the matrix during the epoch and issue the set of grant signals to the virtual output queues to determine which service requests are granted, and an arbiter controller configured to initiate the arbiter circuit with an array of non-conflicting matrix elements.


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