Methods of manufacturing non-volatile memory devices having a vertical channel

Abstract

Disclosed are pairs of semiconductor flash memory cells including first and second source lines formed in a semiconductor substrate, semiconductor pillars extending from the substrate between the source lines, first and second charge storage structures formed on opposite side surfaces of the semiconductor pillar and separated by trench isolation structures. The x and y pitch separating adjacent semiconductor pillars in the memory cell array are selected whereby forming the trench isolation structures serves to separate both charge storage structures and conductive structures provided on opposite sides of a semiconductor pillars. Also disclosed are methods of fabricating such structures whereby the density of flash memory devices, particularly NOR flash memory devices, can be improved.