The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2010

Filed:

Jan. 07, 2009
Applicants:

Sung-min Park, Seoul, KR;

Keun-hyuk Lee, Bucheon-si, KR;

Seung-won Lim, Bucheon-si, KR;

Inventors:

Sung-min Park, Seoul, KR;

Keun-hyuk Lee, Bucheon-si, KR;

Seung-Won Lim, Bucheon-si, KR;

Assignee:

Fairchild Korea Semiconductor Ltd., Puchon, Kyungki-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/49 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a semiconductor package, and in particular a semiconductor package which is capable of electrically connecting to the outside without a lead. The leadless package includes a plurality of lower conducting layer patterns disposed separately from one another; an insulating layer pattern on the lower conducting layer patterns; a plurality of upper conducting layer patterns disposed separately from one another, on the insulating layer pattern; at least one semiconductor chip disposed on the upper conducting layer patterns; hole patterns formed through the upper conducting layer patterns and the insulating layer pattern, so that a part of the top surface of the lower conducting layer patterns are exposed; and electrical connectors electrically connecting: the at least one semiconductor chip and the upper conducting layer patterns; the upper conducting layer patterns and the lower conducting layer patterns exposed by the hole patterns; and the at least one semiconductor chip and the lower conducting layer patterns exposed by the hole patterns.


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