The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 2010
Filed:
Dec. 29, 2008
Yung-chin Hou, Taipei, TW;
Lee-chung LU, Taipei, TW;
Ta-pen Guo, Cupertino, CA (US);
Li-chun Tien, Tainan, TW;
Ping Chung LI, Hsin-Chu, TW;
Chun-hui Tai, Hsin-Chu, TW;
Shu-min Chen, Yongkang, TW;
Yung-Chin Hou, Taipei, TW;
Lee-Chung Lu, Taipei, TW;
Ta-Pen Guo, Cupertino, CA (US);
Li-Chun Tien, Tainan, TW;
Ping Chung Li, Hsin-Chu, TW;
Chun-Hui Tai, Hsin-Chu, TW;
Shu-Min Chen, Yongkang, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
An integrated circuit structure includes a semiconductor substrate; a first active region in the semiconductor substrate; and a second active region in the semiconductor substrate and of an opposite conductivity type than the first active region. A gate electrode strip is over the first and the second active regions and forms a first MOS device and a second MOS device with the first active region and the second active region, respectively. A first spacer bar is in the semiconductor substrate and connected to the first active region. At least a portion of the first spacer bar is adjacent to and spaced apart from a portion of the first active region. A second spacer bar is in the semiconductor substrate and connected to the second active region. At least a portion of the second spacer bar is adjacent to and spaced apart from a portion of the second active region.