The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2010
Filed:
Oct. 26, 2006
Toshiyuki Majima, Kodaira, JP;
Akira Shimase, Kodaira, JP;
Hirotoshi Terada, Hamamatsu, JP;
Kazuhiro Hotta, Hamamatsu, JP;
Toshiyuki Majima, Kodaira, JP;
Akira Shimase, Kodaira, JP;
Hirotoshi Terada, Hamamatsu, JP;
Kazuhiro Hotta, Hamamatsu, JP;
Hamamatsu Photonics K.K., Hamamatsu-shi, Shizuoka, JP;
Abstract
A failure analysis apparatusis composed of an inspection information acquirerfor acquiring a failure observed image Pof a semiconductor device, a layout information acquirerfor acquiring layout information, and a failure analyzerfor analyzing a failure. The failure analyzerextracts candidate nets passing at least one of analysis regions set from the failure observed image, out of a plurality of nets in the semiconductor device, and passage counts of the respective candidate nets through the analysis regions, selects a candidate net with the largest passage count as a first failure net, and selects a second failure net with attention to analysis regions where the first failure net does not pass. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.