The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2010

Filed:

Jun. 07, 2007
Applicants:

Allan Wong, Folsom, CA (US);

KE Yin, El Dorado Hills, CA (US);

Naveen Matam, Rancho Cordova, CA (US);

Anthony Babella, Salida, CA (US);

Wing Hang Wong, Folsom, CA (US);

Inventors:

Allan Wong, Folsom, CA (US);

Ke Yin, El Dorado Hills, CA (US);

Naveen Matam, Rancho Cordova, CA (US);

Anthony Babella, Salida, CA (US);

Wing Hang Wong, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are a method and system for loading test data into execution units in a graphics card to test the execution units. Test instructions are loaded into a cache in a graphics module comprising multiple execution units coupled to the cache on a bus during a design test mode. The cache instructions are concurrently transferred to an instruction queue of each execution unit to concurrently load the cache instructions into the instruction queues of the execution units. The execution units concurrently execute the cache instructions to fetch test instructions from the cache to load into memories of the execution units and execute during the design test mode.


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