The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2010
Filed:
Jul. 24, 2006
Hiroshi Shimada, Yokohama, JP;
Shigeru Michiwaki, Yokohama, JP;
Kazuo Shishime, Yokohama, JP;
Meiko Electronics Co., Ltd., Ayase-shi, JP;
Abstract
A printed wiring board has a first wiring layer formed at least on one surface of an insulative substrate, an insulating layer formed as covering the first wiring layer, and a second wiring layer formed on the insulating layer. The insulating layer is formed of a cured insulative sheet made of a high-stiff sheet-type reinforcing material containing resin. The first and second wiring layers are electrically connected to each other through at least one hole having a bottom. The second wiring layer is united with the insulating layer at an interface thereof with a conductive material of the second wiring layer injected into concave sections provided on the interface. Another printed wiring board has an insulative substrate having a first surface and a second surface, a first insulating layer and a second insulating layer formed on the first surface and the second surface, respectively, and a first wiring layer formed on the first insulating layer and a second wiring layer formed on the second insulating layer. The first and second wiring layers are electrically connected to each other via at least one through hole. The first wiring layer is united with the first insulating layer at an interface thereof with a conductive material of the first wiring layer injected into concave sections provided on the interface. The second wiring layer is united with the second insulating layer at an interface thereof with a conductive material of the first wiring layer injected into concave sections provided on the interface.