The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2010

Filed:

Oct. 03, 2005
Applicants:

Masamichi Kamiyama, Kawasaki, JP;

Masashi Takase, Kawasaki, JP;

Takanori Watanabe, Bunkyo, JP;

Inventors:

Masamichi Kamiyama, Kawasaki, JP;

Masashi Takase, Kawasaki, JP;

Takanori Watanabe, Bunkyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a semiconductor device including a multilayer pad, the multilayer pad comprises a first pad layer provided over a semiconductor substrate to have a first copper wiring region and a first intralayer insulating region provided within the first copper wiring region, and a second pad layer provided over the first pad layer via an interlayer insulating film to have a second copper wiring region and a second intralayer insulating region provided within the second copper wiring region. In the semiconductor device, the first copper wiring region, the first intralayer insulating region, the second copper wiring region, and the second intralayer insulating region are provided in the first and second pad layers such that the multilayer pad has a layout in which all the regions are covered with the copper wiring when the multilayer pad is perspectively viewed from a perpendicularly upper direction for the semiconductor substrate.


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