The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2010

Filed:

Dec. 27, 2006
Applicants:

Chiaki Dono, Tokyo, JP;

Yasuji Koshikawa, Tokyo, JP;

Masayuki Nakamura, Tokyo, JP;

Inventors:

Chiaki Dono, Tokyo, JP;

Yasuji Koshikawa, Tokyo, JP;

Masayuki Nakamura, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device is configured to prevent misprogramming of fuse circuits therein. The semiconductor device includes the following elements. A group of fuse element circuitsis configured to store a first data defining the circuit configuration. A fuse element circuitis configured to store a second data representing inhibition of programming the group of fuse element circuits. A control logic circuitis configured to program the first and the second data on the fuse element circuits. An AND gate circuitis configured to inhibit the control logic circuitfrom programming the group of fuse element circuitson condition that the fuse element circuithas been programmed.


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