Semiconductor memory device and write control method thereof

Abstract

A semiconductor memory device includes a plurality of word lines, a plurality of bit lines, a plurality of memory elements arranged at intersecting points between the word lines and the bit lines, respectively, a row selector selectively activating the word lines, a plurality of write drivers provided to correspond to the bit lines, and supplying a write current to the corresponding bit lines, respectively, a plurality of write control circuits controlling operations performed by the corresponding write drivers, respectively, and a column selector selecting the write control circuits. The column selector sequentially selects a predetermined write control circuit per one clock in a state of activating a predetermined word line, and the selected write control circuit activates one corresponding write driver over a period of one clock or more.