The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2010
Filed:
Sep. 08, 2006
Unsoon Kim, San Jose, CA (US);
Kyunghoon Min, Palo Alto, CA (US);
Ning Cheng, San Jose, CA (US);
Hiroyuki Kinoshita, San Jose, CA (US);
Sugino Rinji, San Jose, CA (US);
Timothy Thurgate, Sunnyvale, CA (US);
Angela Hui, Fremont, CA (US);
Jihwan Choi, San Mateo, CA (US);
Chi Chang, Saratoga, CA (US);
Unsoon Kim, San Jose, CA (US);
Kyunghoon Min, Palo Alto, CA (US);
Ning Cheng, San Jose, CA (US);
Hiroyuki Kinoshita, San Jose, CA (US);
Sugino Rinji, San Jose, CA (US);
Timothy Thurgate, Sunnyvale, CA (US);
Angela Hui, Fremont, CA (US);
Jihwan Choi, San Mateo, CA (US);
Chi Chang, Saratoga, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
Dual storage node memory devices and methods for fabricating dual storage node memory devices have been provided. In accordance with an exemplary embodiment, a method includes the steps of etching a plurality of trenches in a semiconductor substrate and forming a layered structure within the trenches. The layered structure includes a tunnel dielectric layer and a charge storage layer. Bit lines are formed within the semiconductor substrate and a layer of conductive material is deposited overlying the layered structure.