The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2010
Filed:
Jan. 17, 2008
Charles L. Arvin, Poughkeepsie, NY (US);
Benjamin V. Fasano, New Windsor, NY (US);
Mario J. Interrante, New Paltz, NY (US);
Glenn A. Pomerantz, Kerhonkson, NY (US);
Charles L. Arvin, Poughkeepsie, NY (US);
Benjamin V. Fasano, New Windsor, NY (US);
Mario J. Interrante, New Paltz, NY (US);
Glenn A. Pomerantz, Kerhonkson, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Methods and reworked intermediate and resultant electronic modules made thereby, whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Heights of both the solder connections and underfill matrix are reduced, followed by etching the solder out of the solder connections to form openings within the underfill matrix. The underfill material is then removed to expose metallurgy of the substrate. A blank having a release layer with an array of solder connections is aligned with the exposed metallurgy, and this solder array is transferred from the blank onto the metallurgy. The transferred solder connections are then flattened using heat and pressure, followed by attaching solder connections of a new component to the flattened solder connections and underfilling these reworked solder connections residing between the new chip and substrate.