The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Sep. 14, 2007
System and method for reducing power consumption in a data processor having a clustered architecture
Mark Owen Homewood, Winscombe, GB;
Gary L. Vondran, San Carlos, CA (US);
Geoffrey M. Brown, Watertown, MA (US);
Paolo Faraboschi, Brighton, MA (US);
Mark Owen Homewood, Winscombe, GB;
Gary L. Vondran, San Carlos, CA (US);
Geoffrey M. Brown, Watertown, MA (US);
Paolo Faraboschi, Brighton, MA (US);
STMicroelectronics, Inc., Carrollton, TX (US);
Hewlett-Packard Company, Palo Alto, unknown;
Abstract
There is disclosed a data processor having a clustered architecture that comprises at least one branching cluster, at least one non-branching cluster and remote conditional branching control circuitry. Each of the clusters is capable of computing branch conditions, though only the branching cluster is operable to perform branch address computations. The remote conditional branching control circuitry, which is associated with each of the clusters, is operable in response to sensing a conditional branch instruction in a non-branching cluster to (i) cause the branching cluster to compute a branch address and a next program counter address, (ii) cause the non-branching cluster to compute a branch condition, and (iii) communicate the computed branch condition from the non-branching cluster to the branching cluster. The data processor then uses the computed branch condition to select one of the branch address or the next program counter address.