The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2010

Filed:

Dec. 08, 2008
Applicants:

Jeong Tae Kim, Gyeonggi-do, KR;

Seung Jin Yeom, Gyeonggi-do, KR;

Baek Mann Kim, Gyeonggi-do, KR;

Dong Ha Jung, Gyeonggi-do, KR;

Joon Seok OH, Gyeonggi-do, KR;

Nam Yeal Lee, Daejeon, KR;

Jae Hong Kim, Gyeonggi-do, KR;

Inventors:

Jeong Tae Kim, Gyeonggi-do, KR;

Seung Jin Yeom, Gyeonggi-do, KR;

Baek Mann Kim, Gyeonggi-do, KR;

Dong Ha Jung, Gyeonggi-do, KR;

Joon Seok Oh, Gyeonggi-do, KR;

Nam Yeal Lee, Daejeon, KR;

Jae Hong Kim, Gyeonggi-do, KR;

Assignee:

Hynix Semiconductor Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and a metal line forming region is formed in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer, and the diffusion layer has a multi-layered structure of an Ru layer, an RuOlayer, an IrOlayer, and a Ti layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.


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