The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
May. 09, 2007
Chrystel Deguet, Saint Ismier, FR;
Takeshi Akatsu, St Nazaire les Eymes, FR;
Hubert Moriceau, St Egreve, FR;
Thomas Signamarcheix, La Terrasse, FR;
Loic Sanchez, Charnecles, FR;
Chrystel Deguet, Saint Ismier, FR;
Takeshi Akatsu, St Nazaire les Eymes, FR;
Hubert Moriceau, St Egreve, FR;
Thomas Signamarcheix, La Terrasse, FR;
Loic Sanchez, Charnecles, FR;
S.O.I.Tec Silicon on Insulator Technologies, Bernin, FR;
Commissariat Ă l'Energie Atomique (CEA), Paris, FR;
Abstract
A method for fabricating semiconductor on insulator wafers by providing a semiconductor substrate or a substrate that includes an epitaxial semiconductor layer as a source substrate, attaching the source substrate to a handle substrate to form a source handle assembly and detaching the source substrate at a predetermined splitting area provided inside the source substrate and being essentially parallel to its main surface, to remove a layer from the source handle assembly to thereby create the semiconductor on insulator wafer. A diffusion barrier layer, in particular, an oxygen diffusion barrier layer can be provided on the source substrate. In addition the invention relates to the corresponding semiconductor on insulator wafers that are produced by the method.