The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
Oct. 26, 2007
Yuhao Luo, San Jose, CA (US);
Shuxian Wu, San Jose, CA (US);
Xin X. Wu, Fremont, CA (US);
Jae-gyung Ahn, Pleasanton, CA (US);
Deepak Kumar Nayak, Fremont, CA (US);
Daniel Gitlin, Palo Alto, CA (US);
Yuhao Luo, San Jose, CA (US);
Shuxian Wu, San Jose, CA (US);
Xin X. Wu, Fremont, CA (US);
Jae-Gyung Ahn, Pleasanton, CA (US);
Deepak Kumar Nayak, Fremont, CA (US);
Daniel Gitlin, Palo Alto, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of protecting a transistor formed on a die of an integrated circuit is disclosed. The method comprises forming an active region of the transistor on the die; forming a gate of the transistor over the active region; coupling a primary contact to the gate of the transistor; coupling a programmable element between the gate of the transistor and a protection element; and decoupling the protection element from the gate of the transistor by way of the programmable element. Circuits for protecting a transistor formed on a die of an integrated circuit are also disclosed.