The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2010

Filed:

Mar. 22, 2007
Applicants:

Claude Blais, Granby, CA;

Eric Duchesne, Granby, CA;

Kang-wook Lee, Yorktown Heights, NY (US);

Sylvain Ouimet, Saint-Hubert, CA;

Gerald J. Scilla, Essex Junction, VT (US);

Inventors:

Claude Blais, Granby, CA;

Eric Duchesne, Granby, CA;

Kang-Wook Lee, Yorktown Heights, NY (US);

Sylvain Ouimet, Saint-Hubert, CA;

Gerald J. Scilla, Essex Junction, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B08B 7/00 (2006.01); C23F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of removing and/or reducing undesirable contaminants removes residues including graphitic layers, fluorinate layers, calcium sulfate (CaSO) particles, tin oxides and organotin, from a chip passivation layer surface. The method uses a plasma process with an argon and oxygen mixture with optimized plasma parameters to remove both the graphitic and fluorinated layers and to reduce the level of the inorganic/tin oxides/organotin residue from an integrated circuit wafer while keeping the re-deposition of metallic compounds is negligible. This invention discloses the plasma processes that organics are not re-deposited from polymers to solder ball surfaces and tin oxide thickness does not increase on solder balls. The ratio of argon/oxygen is from about 50% to about 99% Ar and about 1% to about 50% Oby volume. Incoming wafers, after treatment, are then diced to form individual chips that are employed to produce flip chip plastic ball grid array packages.


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