The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 03, 2010

Filed:

Aug. 16, 2007
Applicants:

Toshinori Sueyoshi, Kumamoto, JP;

Masahiro Iida, Kumamoto, JP;

Mitsutaka Nakano, Kumamoto, JP;

Fumiaki Senoue, Kumamoto, JP;

Katsuya Mizumoto, Chiyoda-ku, JP;

Inventors:

Toshinori Sueyoshi, Kumamoto, JP;

Masahiro Iida, Kumamoto, JP;

Mitsutaka Nakano, Kumamoto, JP;

Fumiaki Senoue, Kumamoto, JP;

Katsuya Mizumoto, Chiyoda-ku, JP;

Assignee:

Renesas Technology Corp., Chiyoda-Ku, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
Abstract

In arithmetic/logic units (ALU) provided corresponding to entries, an MIMD instruction decoder generating a group of control signals in accordance with a Multiple Instruction-Multiple Data (MIMD) instruction and an MIMD register storing data designating the MIMD instruction are provided, and an inter-ALU communication circuit is provided. The amount and direction of movement of the inter-ALU communication circuit are set by data bits stored in a movement data register. It is possible to execute data movement and arithmetic/logic operation with the amount of movement and operation instruction set individually for each ALU unit. Therefore, in a Single Instruction-Multiple Data type processing device, Multiple Instruction-Multiple Data operation can be executed at high speed in a flexible manner.


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