The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2010

Filed:

Dec. 31, 2008
Applicants:

Ho Ming Karen Wan, Hong Kong, HK;

Yat to William Wong, Hong Kong, HK;

Kwai Chi Chan, Hong Kong, HK;

Kwok Kuen David Kwong, Davis, CA (US);

Inventors:

Ho Ming Karen Wan, Hong Kong, HK;

Yat To William Wong, Hong Kong, HK;

Kwai Chi Chan, Hong Kong, HK;

Kwok Kuen David Kwong, Davis, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

An Analog-to-Digital Converter (ADC) has a Successive-Approximation-Register (SAR) driving a digital-to-analog converter (DAC) that generates an analog voltage compared to an input voltage by a series of stages. The last stage feeds a compare signal to the SAR. Each stage has a dual-input differential amplifier that operates as a unity gain op amp during an auto-zeroing phase and as a high-speed low-gain amplifier during an amplifying phase. The dual-input differential amplifier has two pairs of differential inputs. A secondary pair has an offset-storing capacitor across it, and connects to the output pair through feedback switches during auto-zeroing. A primary pair connects to stage inputs through input switches during the amplifying phase. Since two pairs of differential inputs are provided to the dual-input differential amplifier, the offset capacitor is completely isolated from the input pair. The current sink in the dual-input differential amplifier is adjusted higher during the amplifying period.


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