Semiconductor memory device and refresh control method

Abstract

A semiconductor memory device executes a refresh operation on memory banks, and includes: a command decoder that decodes a command from outside the semiconductor memory device, and outputs a refresh instruction when the command is an auto-refresh command; a refresh command generating unit that outputs a refresh command signal by a predetermined number of times corresponding to the number of word lines to be refreshed in response to the refresh instruction; a refresh address counter that counts up an address designating a memory bank and a word line every time the refresh command signal is output; and a refresh number controller that controls the number of times that refresh command signals are output so that each memory bank is refreshed and, after a count value for designating the word line of the refresh address counter has been changed, at least one of the memory banks is further refreshed.