The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
Jun. 21, 2007
Shu Ern Perng Mark, Penang, MY;
Yit Ping Kok, Permatang Pauh, MY;
Soon Chieh Lim, Gelugor, MY;
Jonathan Park, San Jose, CA (US);
Herman Schmit, Palo Alto, CA (US);
Shu Ern Perng Mark, Penang, MY;
Yit Ping Kok, Permatang Pauh, MY;
Soon Chieh Lim, Gelugor, MY;
Jonathan Park, San Jose, CA (US);
Herman Schmit, Palo Alto, CA (US);
eASIC Corporation, Santa Clara, CA (US);
Abstract
A configurable logic array may include a multiplicity of logic components, which may contain customizable look-up tables, and layers of fixed metal segments all of which may be customizable using a single custom via layer. The integrated circuit containing the configurable logic array may also include a multiplicity of customizable register files, customizable RAM blocks; a ROM block with customizable contents; or test logic with customizable test options and configurations to separately test logic and the PLLs.