The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2010

Filed:

Jan. 11, 2008
Applicant:

David P. Morrill, Scarborough, ME (US);

Inventor:

David P. Morrill, Scarborough, ME (US);

Assignee:

Fairchild Semiconductor Corporation, South Portland, ME (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01D 18/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In an integrated circuit with at least two separate timing circuits, for example both a serializer and a deserializer, a trim value correction factor is developed and applied at the testing of the chip. The correction trim value brings the VCO frequency of the serializer into specifications, but the trim value may also be used to alter the delay between a received clock and data in the deserializer. Since both the serializer and the deserializer were made with the same process, the received clock delay may be corrected by substantially the same correction factor as that applied to the VCO. Illustratively the trim values may be stored on the IC.


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