The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2010
Filed:
Sep. 19, 2008
Takuya Hasumi, Tokyo, JP;
Masakatsu Suda, Tokyo, JP;
Satoshi Sudou, Tokyo, JP;
Advantest Corporation, Tokyo, JP;
Abstract
Provided is a variable delay circuit outputting an output signal delayed with respect to an input signal by a designated delay time, including: a delay controller outputting a control voltage according to the delay time; a MOS transistor receiving the control voltage at a gate, and outputs a drain current according to the control voltage; a correction section connected in parallel to a source and a drain of the current controlling MOS transistor, and outputs a correction current on a monotonic decrease as the drain current increases in a range larger than a predetermined boundary current within a normal usage range of the drain current; and a delay element running an output current resulting from adding the correction current to the drain current, between the delay element and an output terminal of the variable delay circuit, in changing a signal value of the output signal according to the input signal.