The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2010

Filed:

Aug. 16, 2007
Applicants:

Yuki Hosoe, Tokyo, JP;

Koji Kuroki, Tokyo, JP;

Inventors:

Yuki Hosoe, Tokyo, JP;

Koji Kuroki, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 35/00 (2006.01); G01D 18/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A calibration circuit includes: a replica buffer that drives a calibration terminal ZQ; a reference voltage generating circuit that generates a reference voltage VMID; a comparing circuit that compares a voltage appearing in the calibration terminal ZQ with the reference voltage VMID; an impedance adjusting circuit that changes an output impedance of the replica buffer based on a result of comparison carried out by the comparing circuit; and a reference voltage adjusting circuit that adjusts the reference voltage VMID. With this arrangement, the reference voltage VMID can be offset by taking into account a resistance component present between the calibration terminal ZQ and the external terminal, and therefore, a more accurate calibration operation can be carried out.


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