The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2010

Filed:

Nov. 28, 2006
Applicants:

Hiromichi Yamada, Hitachi, JP;

Teppei Hirotsu, Hitachi, JP;

Teruaki Sakata, Hitachi, JP;

Takeshi Kataoka, Tokyo, JP;

Shunichi Iwata, Kodaira, JP;

Inventors:

Hiromichi Yamada, Hitachi, JP;

Teppei Hirotsu, Hitachi, JP;

Teruaki Sakata, Hitachi, JP;

Takeshi Kataoka, Tokyo, JP;

Shunichi Iwata, Kodaira, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A microcontroller in which an increase in hardware is suppressed and data correction capability for software error of RAM can be improved is provided. A microcontroller which performs processing according to a program includes a CPU and a RAM for storing data processed by the CPU, wherein multiplexed regions are defined in the RAM, and when these regions are accessed, an access to an address outputted by the CPU and a copy access to an address obtained by adding or subtracting a certain value to or from the address outputted by the CPU are performed. By this means, the same data can be stored in a plurality of regions and the reliability can be improved.


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