The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2010

Filed:

Jul. 27, 2005
Applicants:

Eric Neyret, Sassenage, FR;

Ludovic Ecarnot, Varces, FR;

Christophe Maleville, La Terrasse, FR;

Inventors:

Eric Neyret, Sassenage, FR;

Ludovic Ecarnot, Varces, FR;

Christophe Maleville, La Terrasse, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.


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Neyret, Eric. (2010). Method of reducing the surface roughness of a semiconductor wafer (U.S. Patent No. 7749910). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7749910

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