The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2010

Filed:

Oct. 17, 2007
Applicants:

Chien-hao Wang, Hsinchu County, TW;

Kuo-hsiang Lin, Kaohsiung, TW;

Yao-ting Huang, Kaohsiung, TW;

Inventors:

Chien-Hao Wang, Hsinchu County, TW;

Kuo-Hsiang Lin, Kaohsiung, TW;

Yao-Ting Huang, Kaohsiung, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/36 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A manufacturing process of a carrier is disclosed. First, a first substrate is provided. A circuit layer having a number of contacts is formed on a surface of the first substrate. Then, a solder mask is formed on the circuit layer and exposes the contacts. Next, a second substrate having an opening is bonded to the surface of the first substrate to form a carrier, and the opening exposes the solder mask and the contacts of the first substrate. Since the contacts are located within the opening, a circuit layout space can be increased, and a chip disposed in the opening can be electrically connected to the contacts directly, so as to reduce the thickness of a chip package structure. Besides, the carrier is formed by laminating the first and the second substrates. Hence, the manufacturing process of the carrier is simplified and yield of the carrier is promoted.


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