The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2010

Filed:

Aug. 03, 2007
Applicants:

Jaume Abella, Barcelona, ES;

Javier Carretero Casado, Barcelona, ES;

Xavier Vera, Barcelona, ES;

Inventors:

Jaume Abella, Barcelona, ES;

Javier Carretero Casado, Barcelona, ES;

Xavier Vera, Barcelona, ES;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 7/02 (2006.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Embodiments of apparatuses and methods for correcting intermittent errors in data storage structures are disclosed. In one embodiment, an apparatus includes a data storage location, error detection logic, inverting logic, control logic, operating logic, and evaluation logic. The error detection logic is to detect an error in a data value read from the data storage location. The inverting logic is to invert the erroneous data value to produce an inverted erroneous data value. The control logic is to cause the inverted erroneous data value to be stored in the data storage location and subsequently read from the data storage location to produce an operand value. The operating logic is to perform a logical operation using the erroneous data value and the operand value. The evaluation logic is to evaluate the result to determine if the error is a soft error.


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