The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7746146 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 29, 2010

Filed:

Sep. 01, 2006
Applicants:

Richard K. Chou, Palo Alto, CA (US);

Damodar R. Thummalapally, Milpitas, CA (US);

Inventors:

Richard K. Chou, Palo Alto, CA (US);

Damodar R. Thummalapally, Milpitas, CA (US);

Assignee:

SuVolta, Inc., Los Gatos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A level shifting circuit can include a first input junction field effect transistor (JFET) having a gate coupled to receive an input signal having a first voltage swing that provides a controllable impedance path between a first supply node and a first terminal of a first bias stack including at least one JFET. A driver circuit can be coupled to receive an output from the first bias stack that provides a level shifted output having a second voltage swing that is less than the first voltage swing.


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Chou, Richard. (2010). Junction field effect transistor input buffer level shifting circuit (U.S. Patent No. 7746146). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7746146

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